Hi, everyone. First, thank you for coming. This is incredible. There's significantly
more people than I ever expected. Yeah, full house and overflowing. Amazing. Okay. Should
I take my mask off to speak if people are okay with that? Okay. Yeah, so meet Lucy. Lucy is the
name of our quantum computer. And we're going to go through how to build a quantum computer
on the hardware level. So comparing the classical hardware stack and the quantum stack at each stage
and seeing how they compare. So I am a software engineer at Oxford Quantum Circuits.
Just for a bit of background on me, I come from an academic quantum theory background.
I then spent some time as a web developer. And I'm at Oxford Quantum merging these two fields
of my life. If people are interested in getting involved just in the quantum world, there is no
unique path. As I'm sure many of people in security know a long time, there was no
fixed path into security. It's the same in quantum. It's very nascent.
So if you're interested, yeah, you can get involved. Yeah, so who we are, we're based in
Reading, which our taxi driver thinks that a 30 minute train makes it a suburb of London. It is
its own town in its own right. But yeah, we're based in South Reading. We build quantum computers
from there on site in Thames Valley Science Park. And our goal is to bring quantum computing
to as many people as possible. That's our goal. And we're going to do that. And we're going to do
this very important to us. We don't want to lock it away behind excessive paywalling or exclusive
access. We're trying to bring it to as many people as we can. There's a lot of chat on the
democratization of quantum computing, we want to bring it to as many as we can. So a quick run
through of the timeline of our company. QCAS, so quantum computing as a service. We delivered this
in July of 2021.
We finished on AWS in February of this year. So you can at any time, if you have an AWS account, log into the
bracket service and access our computer through there. And yeah, we're the first not just firstly, we're
the first non North American company. We're quite quite proud of that. And we've just not just
finished our Series A round of 38 million. So we're going to do some very exciting things. Now we've got
a big chunk of money under our belts. With the University of Tokyo, which, if anyone knows VC goes, they do very
strict diligence due diligence. So we've, we've had our credentials tested. Cool. So here's a quick system
overview. What does a hardware companies sorry, before I get going, I'm gonna say any questions, just raise your
hand.
I'll get to them. This is meant open discussion on hardware. Any questions, throw them up. If you're on the
quantum village discord as well, there is a Lucy channel, throw them in there. And there'll be someone keeping
an eye on. So if you don't want to speak out loud, you can throw it in our discord. And I'll answer those as
well. Cool. So the hardware stack at the minute, this is this is Lucy, a picture of Lucy. As you can see this, you
don't really get a scale, but that's a full server rack.
And so this fridge, that is the fridge is maybe sounds three meters tall. So we're, you know, in the old IBM mainframe days
where you're taking up an entire room for your computer, we maybe have one or two server racks and a massive fridge. So not
really something we can put in people's homes yet. So cloud access is the main way there are a few places very, very that will put
place.
quantum computer into a certain premises for direct access. But for us, cloud access brings it to as many people as
possible. That's access, then we hit the the actual quantum computer. So you hit our compiler. First, that's where I spend a
lot of my time working on the quantum compiler. Do you take we'll take a look at some chasm. Mark shows earlier, this is
quantum assembly language, we are very much
in the assembly era of you declare a register and you operate on bits, and you declare individual operations. So we take that in our
compiler, we perform many transformations and optimizations and spit out some, you know, bytecode effectively. Then we have the
control stack. So that's what you can see here on the left side, this large server rack.
This is what actually controls and manipulates the state of the quantum computer. So this is all FPGA driven, or, you know, custom
firmware and logic, and then microwave control lines, and readout. So our IO is, you know, very simple, basically have an in and an out.
And that's your IO. And then finally, the actual QPU. So we quantum processor unit is the analog,
which is the analogous to the central processor unit. And that's it's about there. And that's where the actual quantum magic happens. So I shouldn't say magic. It's not
magical who is very easily unsandle. If I say magic, someone tell me off. Okay, right into the very lowest layer. The QPU architecture and layout. So this is very much an
analogous to classical transistor design and cpu layout design so at oxford quantum circuits we
are a superconducting qubit company uh continuum are also in the room they're speaking after me
they're an iron trap company you know being british and bbc other hardware providers are
available um but yeah we do superconducting i'll go into that in a minute um and this is
the same level as the transistor in your cpu so that's where the we are designing
what the effectively what the transistor looks like
i'll go a bit later i'll go into so this is our core ip it's called the coaxmon so you notice
our qubits there's the blue transmon our control port and our measurement port are coaxially
connected so they come in from the top and the bottom
so instead of our microwave lines have to come in like transversely and you have to route microwave
lines through one another we just connect straight through into the top and that means
that as we scale out we're not having to redesign microwave control lines every time we build a new
processor we just go horizontally so this is what i think of as cloud horizontal scaling
um and then next we're going to cpu setup but yeah so what this gives us a
technical issue as well one issue we'll go into these are microwave drive pulses that's quite
hard to contain so when you have fields coming in sideways you get leakage right there you drive
one qubit and another one is impacted and so we have very very low crosstalk which is a big
source of noise from this architecture and we get scaling i said you have ion traps which continuum
use
um photonic based systems as well diamond based systems so diamond you have a nitrogen instead
of a carbon and a gap where some electrons stick out and then you have that is a qubit
as well so some solid state devices are coming up as well so what is a qubit um
it's a two level system so you think of a binary bit you have nought or one in a quantum system in
a qubit system we also have nought or one but we also have the superposition of nought and one
which is partly where the quantum power comes from the main point you also have is entanglement
between two qubits which is where you have greater correlations than is possible classically
quantitatively
will go much more into the algorithm side of quantum computing but what we do is we create
a two level system there's a effectively what a trans one is is an artificial atom and atoms you
have a ground state in an atom and you can excite it into the first excited state of the atom those
are our two levels in the one system and we're building fake atoms in order to make these qubits
okay so the next step once we have decided on our transistor or our qubit
architecture we have to connect them up and this is very much the the analogy here is
uh your cpu layout you know there's a lot of cool images now of the new m series
atom processors and how you arrange you know the the the different cores you have
and it's something quite similar here
in in how you connect up your computer the one thing that we don't get in quantum computing that
you get in classical computing is trivial i don't sorry not trivial but easy individual
addressability of bits every bit that so this is one cube qubit zero one two three four five six
seven so all these individual qubits need to be addressed individually
and if you know we drive these things with so we drive a bit flip from naught to one with a
microwave pulse in order to maintain that when you drive a single qubit it only drives that qubit
they need to be addressed on different frequencies
and those frequencies are determined by the properties of uh of of the transmon to different
widths and different fabrication processes change the frequency with width with which it's addressed
and so we there's a an interplay here so continue will go into entanglement so we have
a sense of two-bit operations effectively if you want to interact two bits if you do that on a
classical computer you don't think about this you want this bit and that bit you just do that we can
only do that between directly connected qubits in superconducting architectures and so we have to
design quite carefully between directly connected qubits in superconducting architectures and so we have to design quite carefully
there there's a a trade-off between wanting very high connectivity where you can interact
two bits freely but you also don't to cause collisions you don't want to accidentally
start addressing surrounding bits when you're trying to drive one so there's different solutions
to this ibm have gone for this heavy hex lattice google in their advantage paper they went for this
out and at the minute we have eight qubits live on aws and we have gone for a ring
and this is this is going to you'll see a lot of change in this in the future
especially when it comes to quantum error correction which i'll touch on a bit later
but this is still very active there is no you know clean sense of control unit register
combination you get in a cpu uh we're still working that out and every generation of the
quantum protesters comes with a new connectivity architecture
cool uh any questions yeah
sorry sorry i can't i can't hear would you like you can come and ask it so everyone else
can hear as well this is an open chat so you know you can ask questions uh question here as well
um so my question is um each transmon has eight uh qubits entangled i mean eight ions or whatever
entangled with each other and you have an array of transmons so how many i guess qubits
simultaneously do you have yeah cool thank you thank you for that i wasn't super clear on this
so a transmon they're both just rings
so a transmon is effectively a single bit that is one qubit and on a single computer
we have eight of these right now so we are at the you know eight bit stage computing uh
other ibm are pushing just above 100 at the minute uh and yeah but we're much younger
company than them we'll outscale them don't worry um so this array that you see is the future plans
clear on this this horizontal scaling is where we will go yeah
right now right now we don't have that but we we will be scaling out in you know we'll be growing
soon and the will it look like a soccer ball who knows
so this is this is something that is designing this what this connectivity looks like it
requires input from the entire hardware stack because myself on the compiler team i want the
highest connectivity possible and then the fabrications scream at me when i ask for all
to all connectivity so it's finding that balance between the optimal at every stage of the hardware
cool good question thank you
so we have to make this now so at oxcon circuits we we do all of this by the way so we fabricate
as well and this is in clean rooms it looks very much like your fabrication for a classical
process it has lithography and etching and and this is
really hard you know this is nano fab so this is your these things are you're fabricating on nanometer scales
You've seen how CPUs are 5 nanometers, someone scream at me if they're much smaller than that now.
The fact that they've got this process so slick has taken a very, very long time.
And every time you introduce something new into a quantum process, you're having to redesign your entire fabrication process as well.
So this step looks quite similar.
The processes are slightly different to classical CPUs.
That's largely economies of scale, from what I gather.
Yeah, this step looks similar.
It's in a clean room, lithography, etching, very, very difficult.
Huge respect for our fabrication engineers.
They do an incredible job.
Cool.
That is the quantum processor unit.
Yeah.
Yeah, so the question...
The question is, we are available on AWS, is our computer with them, or is it with us?
So our computer is housed in our offices in Reading, and they cloud access through us.
And one thing, it is all...
Anyone that uses it, our entire data pipe is based within England.
So the data containment and security is very important.
So that's the CPU, effectively.
Before we move on to the control stack, which is something like the motherboard, are there any questions on that?
No.
Cool.
So, controlling these things.
So we have bits, and we have bits that are connected, and that is something like a CPU.
Well, now we want to change them.
If you can't manipulate your bits, they're useless.
You have some static bits floating in the ether.
So this is the...
What...
What we refer to as classical control hardware.
This is this very large server rack that has microwave lines going out, and readout lines coming back in.
I'd say this is something like the motherboard, because in terms of design, this has to manage, you know, the controlling of the CPU.
That's why it's...
If you saw architectures, it probably looks nothing like a motherboard, but it's the closest analogy we have.
So we have a lot of...
RF engineers, a lot of superconducting companies will, because, as I said, these are microwave lines, they are fiendish to control, and managed very cleanly.
And then it's all...
So it's all fed through classical control stack.
So, I'm waffling, let's get back.
What are the challenges with the classical control stack?
So this is all FPGA based, and it has to be quick.
So let's say absolute upper bound for...
So let's say absolute upper bound for...
For the industry for a single qubit gate, so like a NOT operation is 100 nanoseconds, and let's say for a two qubit gate, so interacting two bits, let's say 800 nanoseconds.
There's a rough industry upper bound, so that means if you want to do an if statement, a very core component in computing, you have to read out your bits, process it classically, and then feedback a new instruction.
ieliveарыad 300 nanoseconds
That seems fine for classical compute right?
You can you can do that sort of thing.
But everything takes time here.
When we read out
the state of a qubit, that takes time as well.
And whilst time is happening, everything else is being affected by the environment.
is somewill go into with quantum computing.
Is that it's very noisy, it's very, very sensitive to noise.
And so we're constantly battling.
to counteract the effects of noise so that as you leave your system running idling as you're
doing some compute you it's decohering it's becoming less useful lots of errors are coming in
yeah so that's our control stack right now the control stacks are working very cleanly very
quickly what we're seeing as the the future the next step for a lot of things is uh
mitigating these errors in the in the control level but also after this i'll show a little
video on the sort of dimensions that we're looking at for things there's a limited amount of bits you
can fit into one of these fridges right you maybe have that much space to stick bits once you scale
you have to start networking these fridges together and that means you now have a highly
distributed system you have this distributed fpga control system that's a big
challenge to write and write that quickly and communicate information across your system so if i
we have a quick clip to show the the size that we're operating on
so this is about just under two centimeters squared
and there is a qubit
sat within that square there's a transmont and the the
the measurement side control lines come in coaxially
and this is so this is the connection i was on about it's a physical
capacitive connection that has to be fabricated into the cpu the g qpu
see any pus
or whatever so this is not what uh we have at the minute this is
how we that as much as we can scale on a on a two centimeter squared wafer
that goes into its housing and then so that's the sort of scale size scale that we operate
on and after that you have to start distributing your system which has its own series of challenges
Cool. So, again, any questions on the classical control stack?
Yeah. Sorry, I can't.
Yeah, good question.
How long does it take to read out the state of the qubit?
It's a good question because it's one of
those things that depends how clean you want it.
It can vary. So, if you continuum,
they have trapped ions,
so that they can really flood their system and
really let it saturate for microseconds.
I'm not seeing any shake from continuum.
I'd say around, let's say,
upper bound about a microsecond for
an absolute max of bound generally speaking.
But it's one of those things
that's a big area of
research in terms of how
to measure your qubits
cleanly and in the shortest amount of time.
So, it's going to come down very rapidly, very soon.
Yeah, it will start to come down in the future.
Cool. So, the compiler.
So, this is why- oh, sorry. Yeah.
Yeah. Great question.
How long do qubits stay in the state after you modify them?
So, we call this coherence time.
So, this is how long are your qubits useful for?
And so, for a superconducting architecture,
50 microseconds-ish.
So, that gives you a rough ballpark of how many operations you
can put into a coherent window.
But that varies from within the industry, that varies from 20,000,
microseconds to 100 microseconds.
Yeah. So, formal operation,
upper bounds for superconducting qubits industry,
let's say like 80,
90 nanoseconds for a one qubit gate,
and upper bound 800 nanosecond for a two qubit gate.
So, this is how long does it take to do that?
So, this is a- so, the question was,
how does your gate time scale as you add more bits to the gate?
So, in classical logic,
you can do any on any number of bits and say,
and on many, many bits.
For us to do a three-bit operation,
takes a lot of time to do,
a lot longer than just scaling.
But there are some very neat tricks where you can actually get
three qubit gates to run really, really fast.
There, you have to play some clever tricks with
getting gates to run simultaneously and such.
But it doesn't scale pleasantly,
because you have to take like six two qubit gates to do it.
So, it's six times the length.
Yeah.
.
Yeah. So, that question was
about scheduling gate operations effectively.
How many gate operations can you do simultaneously?
So, for a superconducting architecture,
as long as the,
we can do as many gate simultaneously as we'd like,
as long as there's no overlapping bits.
So, I'll go in the compiler,
there's a scheduler that shunts
as many things simultaneously as possible.
There are other architectures like
iron traps where they have gate regions,
and Continuum can do five gates simultaneously at the minute.
So, different architectures have
different amounts of simultaneous operations they can perform.
.
Yeah. So, that was the number of bits you have on a single wafer is the number of times,
roughly how many you can do simultaneously.
Cool. So, the compiler.
This is where I spend most of my time.
I'll check time. Cool.
Thirty minutes so far.
Yeah, I could talk about this for a long, long time.
time and please ask me questions throughout the weekend on this this is
where I get most excited and this is open chasm 2.0 this is the current
industry standard for an interoperable assembly language so have some headers
open chasm to include a standard library of gates and then you can see the level
we're working on we are declaring a queue reg is a quantum register and the
C reg is a classical register so you're saying give me four qubits and four
classical bits there's one thing to note is we can't directly read quantum
information you measure a quantum bit and it collapses to zero or one and so
that is a classical bit so we convert this quantum information to classical
information and output it into a classical register which is then read so
H
Q naught C X Q naught Q 1 C X these are bit level quantum operations that we're
performing and then you measure the entire quantum register onto the
classical register so that's the this is human readable and we take this
human readable code we do our compiler steps and you get results so what does
this result output look like it's bit strings so when you measure
four qubits every bit collapses into nought or one so you have a four bit
bit string output for four qubits so what does our compiler look like we it's
cat quantum assembly toolchain v1 we called internally ragamuffin because
there's a bit of a ragamuffin to get going and yeah this is we are very much
taking inspiration from classical compiler tools and we're going to be
talking about tool chains so this is swagger compiler the compiler if you
know about classical compilers there's a lot of the same things going on in
quantic compilers because we need that for scalability and optimization so we
take chasm shout out to continuum we use ticket which is their open source
library whoo and that's routing optimization and directionality
I'll touch on that again in a sec, that's important.
AST, we have a generated AST,
generated internal representation,
co-generation step for our, you know,
firmware level, this gives us quantum instruction set,
validate, and then this is where we do scheduling,
which I mentioned before.
Have all the operations,
how many can you do at the same time?
And then that gives you a series of pulses.
Give me a Gaussian for three nanoseconds on this bit.
Give me a square microwave pulse
for 20 nanoseconds on this bit.
So, let's go back to the first step.
This is routing, optimization, and directional gates.
Who has cared about register allocation
when they're coding?
There's a few, that's exciting.
We don't really want people to care about those things,
right, or,
which buses are connected on your CPU.
You don't want to care about
any of the underlying architecture.
So, that's what this routing step does.
We flip that.
So, let's say I want to do a two-bit operation
between qubit four and qubit two.
There's no direct connection there.
I can't do that.
Luckily, there's a quantum swap operation,
which you can literally swap the state of three and two.
So, that's what this routing layer does.
If you ask for an interaction between two and four,
it will swap two and three, do the interaction,
and then swap them back.
And that's so that people can write algorithms
agnostic of hardware.
There's one of the bad things about writing
at assembly level.
This isn't true assembly level,
because it's quite interoperable.
One of the worst things about writing assembly level,
if you want to port it to a different hardware,
well, good luck, you know?
So, we're trying to abstract that hardware step away.
Optimization goes into squashing the number of gates you have.
So, this is the same as any LLVM optimization pass
that removes dead code.
We have very, very similar dead code removal.
The directional gates, again,
so, actually, strictly speaking,
this diagram has a directionality on it as well.
You can't do 0 to 1, with one being the control
and the target, the conditional flips.
We manage that, because that's a frustrating point
to deal with, right?
That's quite hard.
So, one thing I'd like to talk about
that's quite exciting in the community
is the future of quantum compilers.
I've mentioned LLVM briefly, and that's because
there's a big effort in the community
around something called quantum compilers.
called QIR, which if anyone has worked with the LLVM IR,
it's the quantum version of that.
So can we roll our quantum operations into LLVM IR
and perform optimizations using the LLVM tool chain?
And that's a big community effort.
So there's people from Oxford Quantum Circuits
and IBM and Rigetti, Microsoft are playing a big part,
Quantum Machines, Continuum, it's a big community effort
because we want everyone to use it interoperably.
We don't want people stuck writing code
for one piece of hardware and then never be able
to use their algorithm again.
And also there's 30 plus years of compiler expertise
that we can lean in on.
Why are we gonna write constant propagation
when it's as good as it gets in LLVM?
So we're really leaning into the
classical compiler tool chains.
So what we need a lot more of,
classical compiler engineers for optimization passes.
Okay, up next.
Cool.
Any compiler questions?
Yeah.
the question was, can we see the quantum instruction set?
No, I'm sorry.
This is where it becomes proprietary
and quite sensitive for us.
But it's a description of pulses.
I can certainly say that.
It's a description of microwave pulses.
If you would like to see a description of,
I'm not, so I'm not wifi connected,
but you can look up quantum intermediate representation,
which is the current proposed quantum instruction set
for something similar.
Cool.
So now this is, we've left the hardware stack.
And now this is software concerns for the hardware.
So this fridge, this is the fridge that Lucy sits in.
By the time you get to the lowest level,
you're at near absolute zero, minus 273 degrees.
You know, you're at milli Kelvin.
Imagine that that's a big engineering operation
to first get to that temperature
and then maintain it 24 seven.
And so there's a lot of bespoke monitoring alarms
you have to build into.
to your hardware that you don't need to think about
with your classical hardware.
The biggest temperature concern is in Las Vegas
and your iPhone says, please stop using me,
I'm about 48 degrees.
We're at the very opposite end of the scale with that.
And, of course, network stability and bandwidth.
Cool.
And then the final layer within the hardware
is the access layer, which is QCAS,
I call it the computer service,
we're available on AWS.
And yeah, it's super no-frills,
very small, keep it clean, keep it very fast.
So, that's the stack.
So what?
What have we done?
We've got a fridge to near absolute zero.
We designed a qubit,
and it's connectivity.
We fabricated the qubit.
We've housed it in a dilution fridge.
We've designed our micro setup, our control lines,
our FPGAs, we've compiled the FPGAs.
We've built the compiler,
and we set up the cloud so people can use it.
Okay, now what?
Who cares?
Now, what do you do with it?
Well, there's one more step that we need to do,
which is calibrate these things.
So, one of the big challenges that we have
versus classical compute from a calibration standpoint
is the fact that we have continuous values.
We're no longer binary.
So, you can gap your binary bits by five volts.
Ah, then you're fine with calibration.
Your noise has got to be pretty bad to start interfering.
But we have continuous values,
so that becomes a real calibration difficulty.
So, the frequency, phase, amplitude, pulse width
of all these microwave pulses
are something that we control and manipulate
in order to get very high fidelity.
So that when you do nought to one,
you want to actually get a bit flip.
You know, just calibrating a bit flip is a big challenge
in terms of shaping your microwave pulses correctly.
Yeah.
And you'll see in very sophisticated calibration routines,
these microwave pulses are very, very good.
These pulses are not just Gaussian.
They change on the nanosecond scale.
Great.
So, now we can do these operations cleanly,
throw them through our stack,
and you get your results back.
So, note for emissions I'll go on to.
That's our stack and using it.
The next section, I'm going to talk about some emissions
and the future of quantum computing,
the future of computing hardware.
So, any questions on the stack up to that point?
No. Cool.
We'll go on to emissions.
So, I think the biggest notable emission is memory.
We have no RAM, we have no cache,
we have no storage, at least in a quantum sense.
But the first one, RAM,
this is going to be a huge thing in quantum computing.
At the minute, this is effectively a stack machine,
whatever you want to call it.
You load up a buffer of instructions and you hit play,
and they run and you get an output.
If we get quantum RAM,
our ability to speed up algorithms
and run algorithms better just explodes.
It's a real, and there's a huge number of efforts in quantum RAM.
And if we unlock that, we're going to be able to run algorithms.
That would be incredible.
Currently, there is no quantum hardware provider
that also has quantum RAM.
Yeah, we also have cache or storage.
Storage is another one,
because a fun fact about working with quantum information,
you cannot copy it.
You cannot do copy-paste on a quantum piece of information.
If you have many copies of it,
there are many scenarios where you can,
some like sub-cases, but in general,
there is no sense in copying.
So you cannot just copy it to disk and then reload it later.
You can have to, you know,
you can store some classical representation.
As you see, there's no GPU.
This is, you know, bit string output and IO.
We don't have an operating system
where you play around and it's being run on a quantum computer.
You send us the instruction sets and you give it back.
Well, cool.
So that's where we are today.
That's where hardware is at today.
So this is, there's a lot of proof of concept work
going on in quantum computing and the hardware.
And moving beyond that, this is just a,
we're in the NISQ era,
noisy intermediate scale quantum computing.
So coherent times aren't as long as,
there was a question earlier,
coherent times aren't as long as we'd like.
Error correction will come up next.
We need more qubits for error correction.
On the hardware level, it's basically,
the two problems we have are scaling and noise.
Noise is something we cannot escape.
So we'll look at how we can mitigate it.
And scaling is a challenge
that every quantum company is looking at.
At OX Quantum Circuits, I showed you our core IP
is around the horizontal scaling of our qubits.
So we think we've got that covered.
We've got that covered.
Future plans.
So I put this first,
because it's what I'm working on and excited about.
The next generation of compiler infrastructure.
Better optimizations, more interoperability,
and data structures.
There is no quantum list.
There is no quantum hash map.
There are some works on this,
but this is bit level.
We need to think about abstractions
that let people just start writing code
and picking up quantum algorithms.
There's, roughly speaking, two approaches on this.
There are some projects that look at,
if anyone is familiar with CUDA,
writing CUDA code,
you have separate CUDA functions
that say, this is for GPU.
Do your GPU bit here,
which you can do on quantum computing.
Say, this is all classical compute.
This bit, do it quantumly.
Or the dream world is the,
you just write Python,
and it will split out any good quantum bits
and any good classical bits.
There's a company called Horizon Quantum
that are developing compiler architectures
looking at doing exactly this.
They're taking Octave
and splitting it quantum and classical.
Scale the number of qubits.
Next one.
We need more bits.
We're at eight bits.
We'd like a lot more than that.
Quantum error mitigation.
So this is,
preventing errors as they occur.
So one thing you can do is,
let's say you have high readout error,
where your zero state is highly biased
in your readout error.
You can randomize your compilation.
So you add these random angles in,
that randomizes your outputs,
and that's the way you can mitigate
this zero one bias, for example.
Quantum error correction.
I've left till last,
because I think this is going to be,
sorry, this is the biggest challenge
for all quantum hardware providers.
It's an incredible topic,
an incredible idea,
that by entangling qubits,
you take one bit of information
and spread that in a highly entangled state.
You can hide your information from nature.
So that if the environment comes in
and starts impacting your information,
you haven't lost all your information in one go.
We are distributing our information
across many, many bits.
Simplest repetition code.
Zero goes to zero, zero, zero.
One goes to one, one, one.
This is still used in a lot of classical compute,
where there are quantum error correction codes
that can correct for all the different
quantum errors that can occur.
And it's going to be a huge challenge to scale.
When we hit,
there's a figure going around a lot lately,
that when we hit a million qubits,
we're going to be generating
around a terabyte of data a second
in terms of output, testing it, correcting it.
That's a lot of information
for a single computer to fit in one room.
So that's where a lot of the challenge
for classical control stack is going to be,
just throughput.
Hitting a terabyte per second
through a bunch of FPGAs is quite a challenge.
Yeah.
And we're in a bit of a Cambrian explosion
of quantum error correction at the minute.
Every day, there's new results coming out.
And people are reaching the point
where we're actually extending the lifetime
of a quantum computer with error correction.
And then more direct connect to cloud providers,
bringing quantum computers to as many people as we can,
bringing it to more people.
It's something we're very keen on.
And Oxford Quantum, we're expanding
into the Asia Pacific region as well.
So we're trying to bring it everywhere.
Yeah.
And Mark said no sales pitches.
I'm sorry.
My company sent me here,
and they paid for my trip to DEF CON.
A sales pitch.
We are hiring.
Come and join us.
I love it.
Come and speak to me.
I'll speak to you candidly because I love my job.
It's incredible.
I get to build quantum computers for a living.
It's kind of wild.
Yeah.
And thank you.
Yeah.
We see a brighter future.
We're all enabled by quantum.
End of my talk.
And any more questions?
Are my slides available?
I think this talk is recorded.
Yes.
Yeah.
We're all good.
Recorded.
So yeah.
The recording will be available.
Cool.
Yeah.
Thank you.
Yeah.
Thank you.
Thanks for having us.
Great.
Thanks.
Thank you.
Thanks for having us.
Thank you.
Thank you.
Yeah.
Sorry.
No, thank you.
The question was about an issue with old RAM, where operations on one bit were being affected
other bits next to it.
And this is exactly the sort of errors that people see in quantum computing, and exactly
the kind of errors that quantum error correction will correct for.
There is a big challenge with highly correlated errors like that.
So if multiple qubits get an error in a highly correlated way, that's a real challenge.
That's big.
Uncorrelated errors, we sort of know how to deal with.
Challenges like that will be very, very difficult.
Yeah.
Yeah, so the question was around where
a...
Millikelvin, can we push it further to improve our coherence times?
Yes, but the machine returns, exactly what you say.
I think we're better spent right now on improving our calibrations and our operational stability
and that sort of thing.
But yes, we'd be at zero if we could.
Cool.
I'll be around the Quantum Village, so do ask me questions any time if you have any.
Thank you all for listening to your questions.
Cheers.